[LLVMdev] [Valgrind-developers] [GSoC 2014] Using LLVM as a code-generation backend for Valgrind

[Julian Seward]

On 02/26/2014 04:21 PM, Yan wrote:
> For (3), would something like making all statements conditional (like
> LoadG, StoreG, and Exit are) do, or are we talking about something more
> complex?

>> (3) add some level of control-flow if-then-else support to the IR, so
>>     that the fast-case paths for the memcheck helper functions
>>     (helperc_LOADV64le etc) can be generated inline.

Something more complex: being able to add control-flow diamonds
(if-then-else-merge) into the IR.  Then, for example, the load-cases
for Memcheck could be put inline: fast/slow case check before the
diamond, the fast case code in the then branch, the slow case code
calling a helper in the else branch.

Doing control flow diamonds in IR means that both the IR optimiser
and the register allocator will have to deal with control flow
merges, which they don't at present.  That would make them more complex,
although not as complex as they would be if they had to deal with
loops as well.

J