[LLVMdev] request for tutorial

Owen Anderson resistor at mac.com
Thu Sep 26 10:18:04 PDT 2013

Have you read through http://llvm.org/docs/CodeGenerator.html ?  It's a reasonably good document, but IME people tend to ignore it.

On Sep 25, 2013, at 2:13 PM, Preston Briggs <preston.briggs at gmail.com> wrote:

> I don't really find it in the documentation so far, but I think the instruction selection stuff is based on a BURG-like pattern matcher. It seems like this is the key intellectual challenge for the not-completely RISC machines. Lots of discussion seems warranted, but I find none at all. Somewhere inside the x86 target must be a lot of stuff on how to handle a 2-address machine. I've done an x86 CG once before, and all of the fun was in getting the right set of patterns to handle the fancy addressing modes, the condition codes, and the 2-address instructions. I'm working on a 1-address machine now (an accumulator machine, with a set of register and an accumulator, and instructions of the form ACC += Register) and the pattern matcher to do everything optimally is delightful.

SelectionDAG is actually not a BURG optimal tiler; it's a simple maximal munch pattern-matcher.  The output of the instruction selector is still in SSA form, which mandates that, no matter the address form of your machine, you'll need to model operations as been three-operand, with a tying constraint that will be satisfied later by the register allocator.  I don't know that anyone has been particularly successful at targeting accumulator architectures with LLVM, but you might look at how X86 handles integer multiplies for some inspiration.

> what do we want to build? Do we need an assembler?, a disassembler?, a JIT?, an instruction scheduler?, a register allocator?

The minimal amount of stuff you need to write is described in http://llvm.org/docs/WritingAnLLVMBackend.html#basic-steps

Generally speaking, it amounts to defining your register classes and instructions, and implementing enough callbacks for instruction selection and register allocation (e.g., how to materialize a copy).

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