[LLVMdev] Scheduling with RAW hazards

Fraser Cormack fraser at codeplay.com
Thu May 9 04:02:25 PDT 2013

I have an instruction that takes no operands, and produces two results, 
in two consecutive cycles.

I tried both of the following to my Schedule.td file:

InstrItinData<IIMyInstr,  [InstrStage<2,  [FuncU]>], [1, 2]>,
InstrItinData<IIMyInstr,  [InstrStage<1,  [FuncU]>, InstrStage<1, 
[FuncU]>], [1, 2]>,

 From what I can see in examples, these say that the first operand is 
ready the cycle after issue, and the second is ready 2 cycles after issue.

But when I issue an instruction that uses both results, it does not obey 
this hazard, and is issued the cycle immediately after.  Are there any 
target hooks I need to implement to get this scheduling correctly?

I noticed that my target was using the default HazardRecognizer, which 
is effectively disabled, so I changed it to use the 
ScoreboardHazardRecognizer instead. I'm also still using the 
SelectionDAG scheduler, but will need to change to the MI scheduler at 
some point, to keep up with trunk. Should either of these help?


Fraser Cormack
Compiler Developer
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