[LLVMdev] MnemonicAliases and side-effects
Muhammad Tauqir Ahmad
muhammad.t.ahmad at intel.com
Mon Mar 25 10:08:03 PDT 2013
I have a question about Instructions and MnemonicAliases.
Let's say I have an instruction (an instruction prefix actually, in
the X86 backend), and the instruction has 'Defs' and 'Uses' defined
If I define a MnemonicAlias from that instruction prefix to another,
then do the 'Defs' and 'Uses' get "applied" to the alias as well?
In other words, is it possible to define two instruction prefixes with
the same "opcode" such that one prefix defines 'Defs' and 'Uses' while
the other does not.
- Muhammad Tauqir
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