[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass

Gurd, Preston preston.gurd at intel.com
Tue Sep 11 11:52:45 PDT 2012

-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of John Criswell
Sent: Tuesday, September 11, 2012 1:42 PM
To: Steve Checkoway
Cc: LLVMdev at cs.uiuc.edu
Subject: Re: [LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass


>> The code for adding the 32-bit instruction is:
>> BuildMI(MBB,MI,dl,TII->get(X86::PREFETCHNTA)).addReg(0).addImm(0).add
>> Reg(0).addImm(<constant>).addReg(0);
> That's surprising to me. What are all of those registers and immediates for?

That is precisely my question.  What do all of those register and immediate arguments do?

-- John T.

The X86 backend records a machine memory operand using a sequence of five operands, as follows:

Base Register
Scale Amount
Index Register
Address offset
Segment register

See lib/Target/X86/MCTargetDesc/X86BaseInfo.h.


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