[LLVMdev] Unaligned vector memory access for ARM/NEON.
peter.couperus at st.com
Wed Sep 5 14:42:07 PDT 2012
I am a first time writer here, but am a happy LLVM tinkerer. It is a
pleasure to use :).
We have come across some sub-optimal behavior when LLVM lowers loads for
vectors with small integers, i.e. load <4 x i16>* %a, align 2,
using a sequence of scalar loads rather than a single vld1 on armv7
linux with NEON.
Looking at the code in svn, it appears the ARM backend is capable of
lowering these loads as desired, and will if we use an appropriate
It appears this was actually enabled relatively recently.
Seemingly, the case where the Subtarget has NEON available should be
handled the same on Darwin and Linux.
Is this true, or am I missing something?
Do the regulars have an opinion on the best way to handle this?
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