[LLVMdev] LLVM Loop Vectorizer

Hal Finkel hfinkel at anl.gov
Fri Oct 5 11:32:33 PDT 2012

----- Original Message -----
> From: "Shuxin Yang" <shuxin.llvm at gmail.com>
> To: "Nadav Rotem" <nrotem at apple.com>
> Cc: "llvmdev at cs.uiuc.edu Mailing List" <llvmdev at cs.uiuc.edu>
> Sent: Friday, October 5, 2012 12:33:17 PM
> Subject: Re: [LLVMdev] LLVM Loop Vectorizer
> >I think that the first step would be to expose Target Lowering
> >Interface (TLI) to OPT's IR-level passes.
> By "lowering", we assume the bitcode is more abstract than the
> machine code. However, in some situations, it is just opposite. For
> instance, some architectures support vectorization of
> min/max/saturated-{add,sub) / conditional-assignment/etc / ../etc.
> We need to detect such machine dependent patterns, and * PROMOTE *
> the bitcode into right forms before we are able to vectorize them.
> How to deal with this situation?

This is a matter of naming. TLI contains information about target capabilities, and could be used to affect the kinds of normalization decisions that you mention.


> Shuxin
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Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory

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