[LLVMdev] Half Float fp16 Native Support

[beat]

hi all,

i am trying to implement native support for fp16 in llvm-3.1 

i have already used the opencl patch for clang so the IR that is generated
is correct.

i tried to add some code so the  the fp16 type is handled correctly but no
luck. 

We have a target that has native fp16 units and tried to run a simple
program 

int main ()
{

__fp16 a,b,c,d;

        a= 1.1;
        b=2.2;
        c=3.3;
        d = a + b + c;

        return 0;
}

and when i try to call llc  produces this error

LLVM ERROR: Cannot select: 0x234bab0: f16 = fadd 0x234b8b0, 0x234c2b0
[ORD=9] [ID=29]
  0x234b8b0: f16 = fadd 0x2349970, 0x2349a70 [ORD=7] [ID=28]
    0x2349970: f16,ch = load 0x234db10, 0x2349170, 0x2348e70<LD2[%a]>
[ORD=5] [ID=26]
      0x2349170: i32 = FrameIndex<1> [ORD=2] [ID=4]
      0x2348e70: i32 = undef [ORD=1] [ID=3]
    0x2349a70: f16,ch = load 0x234db10, 0x2349470, 0x2348e70<LD2[%b]>
[ORD=6] [ID=25]
      0x2349470: i32 = FrameIndex<2> [ORD=3] [ID=5]
      0x2348e70: i32 = undef [ORD=1] [ID=3]
  0x234c2b0: f16,ch = load 0x23207a0, 0x234dd10,
0x2348e70<LD2[ConstantPool]> [ID=24]
    0x234dd10: i32 = add 0x2349370, 0x234dc10 [ID=22]
      0x2349370: i32,ch = load 0x23207a0, 0x234c3b0,
0x2348e70<LD4[ConstantPool]> [ID=20]
        0x234c3b0: i32 = NemaCoreISD::Wrapper 0x2349870, 0x2349670 [ID=17]
          0x2349870: i32 = Register %GP [ID=14]
          0x2349670: i32 = TargetConstantPool<half 0x400A680000000000> 0
[TF=2] [ID=13]
        0x2348e70: i32 = undef [ORD=1] [ID=3]
      0x234dc10: i32 = NemaCoreISD::Lo 0x2349570 [ID=18]
        0x2349570: i32 = TargetConstantPool<half 0x400A680000000000> 0
[TF=6] [ID=15]
    0x2348e70: i32 = undef [ORD=1] [ID=3]

So my question is

As we are working on half float fp16 support in LLVM are there any plans to
support it
on the main trunk ?

thanks

Nikos Stavropoulos



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