[LLVMdev] Some questions on SelectionDAG
baldrick at free.fr
Fri Sep 2 11:15:40 PDT 2011
> 3. In the ARMISelLowering constructor, it sets the callback function with
> setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
> My question is ARM don’t support MVT::i1 registerclass, why should it determine
> this operation with MVT::i1 value?
note that i1 is not a result type or operand type for SEXTLOAD; it is an
auxiliary value stored in a VALUETYPE node (IIRC). Thus the fact that i1
is not legal for this platform doesn't stop it from turning up, which is
why ARM needs to say what to do with it. You might wonder why you can get i1
here and not i2. That's because i1 is a simple value type, while i2 isn't.
The reason i1 is a simple value type is because you can play some tricks with
it that result in better code for booleans; x86 pretends to support extending
loads from i1 for example for this reason. Types like i2 are not interesting
in this way since they don't occur in practice, so they are left as extended
value types; the code generators zap all SEXTLOAD nodes that extend from an
extended value type automagically.
More information about the llvm-dev