[LLVMdev] Trunc Load
e0902998 at student.tuwien.ac.at
Thu Oct 27 10:40:31 PDT 2011
> This is contradictory: on a little-endian processor, the address for
> loading a 64-bit value is same as the address of the low word. Are
> you sure you're modeling the semantics of your lddw and stddw
> instructions correctly?
... I thought so until now. Because I implemented stdw (store
doubleword) completely analogous to lddw: Just print out stdw with the
given pointer and the register pair, just like lddw. (This seems obvious.)
Well, ****. I just read the documentation very carefully (yeah I know.
I'm sorry) and it seems that stdw doesn't care about the big/little
endian setting, it always writes the regpair into memory in big endian.
lddw, however, DOES care about the setting - if little endian is
enabled, the result register pair gets switched. What kind of confusion
could have provoked the TI engineers to create such a horrible
OK, thanks for the hints. I'll try to sort this out.
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