[LLVMdev] weird issue with target intrinsics
Micah.Villmow at amd.com
Wed Apr 13 15:18:59 PDT 2011
I'm wondering if anyone has seen this issue before and if so, how was it fixed?
I have a file with multitude of target intrinsic in my code generator. It has worked great so far, but now I am running into this weird issue. If I add two new intrinsics such as:
def int_AMDIL_dummy_intr 1: GCCBuiltin<"__amdil_dummy_intr1">,
def int_AMDIL_dummy_intr2 : GCCBuiltin<"__amdil_dummy_intr2">,
Once I do this, I get an error that a completely unrelated intrinsic can no longer be selected. If I comment out these intrinsic, the other intrinsic is selected correctly.
Any ideas on how to debug this?
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