[LLVMdev] ARM Intruction Constraint DestReg!=SrcReg patch?

[Paul Curtis]

Hi,

> I am using a cross compiler to compiler for the arm5 architecture. For
this
> architecture it is not allowed that a destination register is also used as
source
> register.
> In 2007 a patch was discussed at the mailing list, however my compiler
still is
> producing this result. Does anyone know if this patch is actually applied?
> 
> * I use the following arguments:
> llvm-gcc -mfpu=vfp -mlittle-endian -mfloat-abi=softfp -march=armv5 -S
> -O3 foo.c -S -o foo.s
> * Attached to this document foo.c and the resulting foo.s. Please, take
note of
> the illegal instruction mul r0, r0, r2 at line 18.
> * The patch is discussed at:
> http://www.mail-archive.com/llvm-commits@cs.uiuc.edu/msg14069.html
> * llvm-gcc --version
> llvm-gcc (GCC) 4.2.1 (Based on Apple Inc. build 5658) (LLVM build)
Copyright
> (C) 2007 Free Software Foundation, Inc.

If you read the Arm Architecture document for ARMv5, it states for MUL:

"Operand restriction:  Specifying the same register for <Rd> and <Rm> was
previously described as producing UNPREDICTABLE results. There is no
restriction in ARMv6, and it is believed all relevant ARMv4 and ARMv5
implementations do not require this restriction either, because high
performance multipliers read all their operands prior to writing back any
results."

Therefore I do not believe you need to worry about this at all. 

--
Paul Curtis, Rowley Associates Ltd   http://www.rowley.co.uk
SolderCore arriving Winter 2010!   http://www.soldercore.com