[LLVMdev] Intrinsics and dead instruction/code elimination

o.j.sivart at gmail.com o.j.sivart at gmail.com
Tue Jul 20 07:42:52 PDT 2010

Chris, all,

I finally got around to implementing this scenario a while back in what I was doing at the time. It is, Chris, as you believed to be the case, that the machine-code-generation layers include optimisations to remove the individually dead setcc operations on x86.

It interests me, however, at this point, to think in broader terms here about the approach which has been adopted to deal with what boils down to implicit data dependancies. LLVM has adopted the approach that is almost universally seen traditionally, wherein, at the high-level, these dependancies are tied together in a unified indistinguishable unit (in this case an intrinsic) and then at the lower-level back-end, special casing is applied to optimise and reduce. I have seen very few cases of, but still wonder whether, creating virtual data dependancies at the high-level, and thus allowing more general and possibly simpler/earlier optimisations in the front-end, rather than special cases in each back-end, has value.

I leave this as an open question to ponder, as I do.

On 20/05/2010, at 8:55 AM, o.j.sivart at gmail.com wrote:

> On 20/05/2010, at 8:16 AM, Chris Lattner wrote:
>> On May 19, 2010, at 3:13 PM, o.j.sivart at gmail.com wrote:
>>>> Intrinsics should be optimized as well as instructions.  In this specific case, these intrinsics should be marked readnone, which means that load/store optimization will ignore them.  Dead code elimination will delete the intrinsic if it is dead etc.
>>> I understand that dead code elimination is able to delete the intrinsic if it is dead. What I'm interested in is whether or not, despite the entire intrinsic not being dead, anything is able to eliminate the setcc on overflow instruction part of the first intrinsic given that the store of obit1 is dead, thus obit1 is not needed, thus extracting the overflow bit from the CFLAGS register via a setcc instruction is no longer needed. I assume nothing is able to perform such optimisation on intrinsics and my guess is that the only option is, as I said, a pass which rewrites the first intrinsic to just its corresponding arithmetic instruction once a pass has dead store eliminated the first store. Is this the case?
>> I believe so, but you should write a testcase and see for yourself.
> I'll certainly do that before I start implementing additional intrinsics, since the llvm.*.with.overflow.* intrinsics are a simple subset of the overall optimisations I'm interested in exploring. The reason I'm interested in whether or not the setcc on overflow instruction part of the first intrinsic is able to be eliminated directly, instead of being eliminated indirectly via a pass which replaces llvm.*.with.overflow.* intrinsics with their corresponding non-intrinsic arithmetic operations, is because I'm interested in an intrinsic of the form lvm.*.with.carry.overflow.zero.sign.* which enables the extraction of the CF, OF, ZF, and SF values from the FLAGS register, where any combination of the extraction may not be needed, since at in the general case most will be clobbered. If it is the case that the indirect approach to elimination is the only approach, this means I need to write all 14 subsets of the intrinsic. At this point it's probably worth instead considering just writing some instructions and supporting a limited set of passes.

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