[LLVMdev] [PATCH] Emit rbit, clz on ARM for __builtin_ctz
lessen42 at gmail.com
Thu Jan 14 22:13:11 PST 2010
On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction sequence it is now.
I'm not sure if adding RBIT to ARMISD and doing this optimization in the legalize pass is the best option, but the only better way I could think of doing it was to add a bitreverse intrinsic to llvm ir, which itself might not be the best option since bitreverse probably isn't too common.
Other targets that I know of that could potentially benefit from this optimization being global (that have a clz and bitreverse instruction but not ctz) are AVR32 and C64x, neither of which llvm has backends for yet.
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