[LLVMdev] Assembly Printer

Chris Lattner clattner at apple.com
Sat Jan 2 23:00:22 PST 2010

On Jan 1, 2010, at 12:51 PM, mmms1841 wrote:

> I am trying to understand how LLVM does code generation and I have a couple of questions.
> I am using LLVM 2.6.
> First, 
> if I want to change the name of an instruction,  all I need to do is to modify the XXXInstrInfo.td, right?
> Using Sparc as an example,  if I wanted to output "mysra" instead of "sra", in SparcInstrInfo.td, I would write,
> defm SRA : F3_12<"mysra", 0b100111, sra>;
> Is this correct? 


> When I run llc with option -march=sparc, after I make the modification, it still outputs "sra", not "mysra". I looked into SparcGenAsmWriter.inc, and made sure that string AsmStrs includes "mysra". However, when I run gdb and do "print AsmStrs + (Bits & 1023)", it prints "sra". 
> Does this make sense or am I just overlooking something? 

Sounds like something is being overlooked.  Perhaps tblgen didn't get rerun or something didn't get relinked. 

> The second question is about pattern matching of instructions.
> I found that some of the target instructions do not have corresponding patterns to match.
> For example,  in SparcInstrInfo.td, "udiv" and "sdiv" don't seem to have any patterns specified.
> defm UDIV : F3_12np<"udiv", 0b001110>;
> defm SDIV : F3_12np<"sdiv", 0b001111>;
> Is this because these instructions are handled differently from other instructions in SparcISelDAGToDAG.cpp?
> In function SparcDAGToDAGISel::Select(SDValue Op), instruction selection for "sdiv" and "udiv" is done in the switch-case statement, while SelectCode(Op) takes care of the other instructions.

Yep, exactly,

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