<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jan 1, 2010, at 12:51 PM, mmms1841 wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite">I am trying to understand how LLVM does code generation and I have a couple of questions.<br>I am using LLVM 2.6.<br>
<br>First, <br>if I want to change the name of an instruction, all I need to do is to modify the XXXInstrInfo.td, right?<br>Using Sparc as an example, if I wanted to output "mysra" instead of "sra", in SparcInstrInfo.td, I would write,<br>
<br>defm SRA : F3_12<"mysra", 0b100111, sra>;<br><br>Is this correct? <br></blockquote><div><br></div>Yes.</div><div><br><blockquote type="cite">When I run llc with option -march=sparc, after I make the modification, it still outputs "sra", not "mysra". I looked into SparcGenAsmWriter.inc, and made sure that string AsmStrs includes "mysra". However, when I run gdb and do "print AsmStrs + (Bits & 1023)", it prints "sra". <br>
Does this make sense or am I just overlooking something? <br></blockquote><div><br></div>Sounds like something is being overlooked. Perhaps tblgen didn't get rerun or something didn't get relinked. </div><div><br></div><div><blockquote type="cite">The second question is about pattern matching of instructions.<br>
I found that some of the target instructions do not have corresponding patterns to match.<br>For example, in SparcInstrInfo.td, "udiv" and "sdiv" don't seem to have any patterns specified.<br> <br>
defm UDIV : F3_12np<"udiv", 0b001110>;<br>defm SDIV : F3_12np<"sdiv", 0b001111>;<br><br>Is this because these instructions are handled differently from other instructions in SparcISelDAGToDAG.cpp?<br>
In function SparcDAGToDAGISel::Select(SDValue Op), instruction selection for "sdiv" and "udiv" is done in the switch-case statement, while SelectCode(Op) takes care of the other instructions<b>.<br></b></blockquote></div><br><div>Yep, exactly,</div><div><br></div><div>-Chris</div></body></html>