[LLVMdev] converting an unconditional into a conditional branch

Florian Merz florian.merz at kit.edu
Mon Feb 8 07:49:10 PST 2010


I'm learning to use the llvm API, but I got a question for which I haven't 
found a good answer yet:

What is the best way to turn an unconditional branch into a conditional 
branch? All I want to do is add two more operands, a successor and a 
condition. But no matter how I try to do this any one of 
setCondition()/setOperand()/setSuccessor() causes an assertion like these:

Cannot set condition of unconditional branch!
Successor # out of range for Branch!
setOperand() out of range!

Can this only be done by completely replacing the unconditional branch 
instruction with a new, conditional one or is there a method with which I can 
implicitly turn an unconditional branch into a conditional one by adding a 
condition and a successor?

I'd be glad if anyone could give me a hint on how to do this most elegantly.


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