[LLVMdev] RFC: AVX Pattern Specification [LONG]

[Evan Cheng]

On May 1, 2009, at 3:50 PM, Chris Lattner wrote:

>
> The goal is to replace the pattern fragment and the C++ code for
> X86::isMOVDDUPMask with something like:
>
> def movddup : PatFrag<(ops node:$lhs, node:$rhs),
>                       (vector_shuffle node:$lhs, node:$rhs,
>                                       0, 1, 0, 1, Cost<42>)
>
> Alternatively, the cost could be put on the instructions etc, whatever
> makes the most sense.  incidentally, I'm not sure why movddup is
> currently defined to take a LHS/RHS: the RHS should always be undef so
> it should be coded into the movddup def.
>
> Another possible syntax would be to add a special kind of shuffle node
> to give more natural and clean syntax.  This is probably the better
> solution:
>
> def movddup : Shuffle4<VR128, undef, 0, 1, 0, 1>, Cost<42>;

What does "cost" mean here? Currently isel cost means complexity of  
the matched pattern. It's hard to compute this by hand so the current  
hack is  to allow manual cost adjustments.

I think it makes sense for isel to use HW cost (instruction latency,  
code size) as a late tie breaker. In that case, shouldn't cost be part  
of instruction itinerary?

Evan