[LLVMdev] Adding multiples-of-8 integer types to MVT

[Duncan Sands]

Hi Ken,

> Would there be any interest/opposition to extending the set of simple
> integer types in MVT to include the missing multiples of 8 (up to 64
> bits)? That is: i24, i40, i48, i56?

the type legalizer would need some work.  Consider an architecture which has a
24 bit register.  Then the type legalizer should legalize an i40 by first
promoting it to an i48, then expanding that to two lots of i24.

Another issue is how vectors of i24 would be represented in memory.  Would
successive vector elements be 3 bytes apart or 4 bytes apart?  The current
code for vector codegen assumes that vectors are tightly packed (this is
already wrong for x86 long double).

Ciao,

Duncan.