[LLVMdev] CFG modifcations and code gen

Villmow, Micah Micah.Villmow at amd.com
Tue Oct 14 16:19:14 PDT 2008

After a bunch more investigate, I've seem to have figured out what is
going on here. The MachineFunction holds a vector of MachineBasicBlocks
and it is this vector that is traversed by the MachineFunction iterator
when printing out instructions. The problem is occurring when a
modification to the CFG moves around so that the ordering of them is
different. Even if the pred/succ blocks are modified, their position in
the MBBNumbering vector does not change. This causes the CFG graph and
the MachineFunction vector to become out of sync causing all sorts of
issues with code generation. (i.e. having my return block being
generated in the middle of a loop).


I figured that sorting the vector based on the block id's would fix this
issue, but the constructor required to sort correctly is marked as


So, my basic need is this. How do I re-order the MachineBasicBlocks
vector based on their Block ID numbers via the current API(2.3)?



From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
On Behalf Of Villmow, Micah
Sent: Tuesday, October 14, 2008 10:59 AM
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] CFG modifcations and code gen



 I took a look at AnalyzeBranch and I don't see how it can solve my
problem. The issue itself isn't with branching, as I can handle branches
fairly well in my custom pass(see the before and after dot files
attached). I can take a bunch of branches and construct high level
control flow for my backend since I have no ability to do goto/jump,
only whileloop and ifs. So analyzing the branch's isn't the problem. The
problem comes with emit'ing the code. Even though I've renumbered the
blocks and re-ordered the CFG into a more sane control flow. The code
emitter still processes the blocks in the old order. So instead of going
from 0-5, it prints out the instructions in the order, 0, 1, 2, 5, 3, 4.
This is the order that the old CFG is in, not the new one after this
pass is done.

I've added this analysis pass as a PreEmitPass, is this the correct
location to implement this? Or should I be implementing it earlier?



Thanks for any advice,



From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
On Behalf Of Chris Lattner
Sent: Tuesday, October 14, 2008 9:50 AM
To: LLVM Developers Mailing List
Subject: Re: [LLVMdev] CFG modifcations and code gen



On Oct 14, 2008, at 9:16 AM, Villmow, Micah wrote:


But, the branch folding pass, or whatever passes are supposed to reorder
the blocks based on the CFG, are not doing so in this case. Otherwise
there is no way that blocks 2 and 4 should be printing out before blocks
3 & 5. Renumber blocks just seems to reorder the values based on their
pre-set block number, but when the CFG is modified these number should
modified also to follow the new ordering, which is not occurring.


Did you implement TargetInstrInfo::AnalyzeBranch for your target?  Check
out the large comment above it in TargetInstrInfo.h



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