[LLVMdev] Making Sense of ISel DAG Output

[David Greene]

I'm debugging some X86 patterns and I want to understand the debug dumps from 
isel better.

Here's some example output:

  0x391bc40: i64,ch = load 0x3922c50, 0x391b8d0, 0x38dc530 <0x39053e0:0> <sext 
i32> alignment=4 srcLineNum= 10
    0x3922c50: <multiple use>
          0x391bc40: <multiple use>
          0x3856ab0: <multiple use>
        0x3914520: i64 = shl 0x391bc40, 0x3856ab0 srcLineNum= 10
        0x38569b0: <multiple use>
      0x391bdf0: i64 = add 0x3914520, 0x38569b0 srcLineNum= 10
      0x39127c0: <multiple use>
    0x3913dd0: i64 = add 0x391bdf0, 0x39127c0 srcLineNum= 10
    0x38dc530: <multiple use>
  0x391bf40: f64,ch = load 0x3922c50, 0x3913dd0, 0x38dc530 <0x3850d30:0> 
alignment=8 srcLineNum= 10

I think I've figured out that lines with greater indent feed lines with lesser 
indent.  So for example, the final load is fed by three operands: 0x3922c50,
0x3913dd0  and 0x38dc530.  And <multiple use> seems to mean a node that feeds 
many nodes.

Is this understanding correct?

Is there any way to tell how these dags map onto the final machine instruction 
sequence?  I'm having a hard time making sense of where some machine 
instructions are coming from -- they appear to be superfluous.  And I have a 
pattern that specifies two distinct memory operands but the final code 
sequence produced uses only one of them.

I'll try ot write a small example and send it in a bit.

                                                     -Dave