[LLVMdev] PowerPC instruction cache invalidation

Gary Benson gbenson at redhat.com
Tue Jun 17 02:37:22 PDT 2008

Nicolas Geoffray wrote:
> Gary Benson wrote:
> > When you genetate code on PowerPC you need to explicitly
> > invalidate the instruction cache to force the processor to reread
> > it.  In LLVM there is code to do this for function stubs on
> > Macintosh, but not for other platforms and not for JITted code
> > generally.
> Did you run into errors when not invalidating the cache? vmkit JITs
> and runs on powerpc/linux without invalidating it, so I'm curious
> about when the problem occurs.

Yeah, I started getting SIGILLs, and I've had them before with a
similar thing so that's why I started looking.  Then I hacked it into
my app to check and the errors went away.  They're intermittent, so
I guess it depends on the speed of your box, how close in memory it's
allocating the code, and whatever else it happens to be doing in the



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