[LLVMdev] PowerPC instruction cache invalidation

Gary Benson gbenson at redhat.com
Tue Jun 17 02:34:06 PDT 2008


Chris Lattner wrote:
> On Mon, 16 Jun 2008, Gary Benson wrote:
> > When you genetate code on PowerPC you need to explicitly
> > invalidate the instruction cache to force the processor to reread
> > it.  In LLVM there is code to do this for function stubs on
> > Macintosh, but not for other platforms and not for JITted code
> > generally.
> 
> Applied, thanks!

Thanks :)

> I tweaked it to work on non-ppc systems too.

I had to revert the change you made there -- my system doesn't seem to
have any of __POWERPC__, __ppc__ or _POWER power defined...

> > The attached patch adds support for GNU platforms, but I can't
> > figure out a nice way to call it for all generated code.  Can
> > anyone help?
> 
> Can you elaborate on what the problem is?

The attached patch generalizes it (aKor helped me out).  I don't know
if Intel needs some kind of cache invalidation too but if it does it
could use the same hooks.

Cheers,
Gary

-- 
http://gbenson.net/
-------------- next part --------------
Index: include/llvm/Target/TargetJITInfo.h
===================================================================
--- include/llvm/Target/TargetJITInfo.h	(revision 52391)
+++ include/llvm/Target/TargetJITInfo.h	(working copy)
@@ -94,6 +94,11 @@
       assert(NumRelocs == 0 && "This target does not have relocations!");
     }
 
+    /// InvalidateInstructionCache - Before the JIT can run a block of code
+    // that has been emitted it must invalidate the instruction cache on some
+    // platforms.
+    virtual void InvalidateInstructionCache(const void *Addr, unsigned len) {}
+
     /// needsGOT - Allows a target to specify that it would like the
     // JIT to manage a GOT for it.
     bool needsGOT() const { return useGOT; }
Index: lib/Target/PowerPC/PPCCodeEmitter.cpp
===================================================================
--- lib/Target/PowerPC/PPCCodeEmitter.cpp	(revision 52391)
+++ lib/Target/PowerPC/PPCCodeEmitter.cpp	(working copy)
@@ -80,10 +80,6 @@
   return new PPCCodeEmitter(TM, MCE);
 }
 
-#ifdef __APPLE__ 
-extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
-#endif
-
 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
   assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
           MF.getTarget().getRelocationModel() != Reloc::Static) &&
Index: lib/Target/PowerPC/PPCJITInfo.h
===================================================================
--- lib/Target/PowerPC/PPCJITInfo.h	(revision 52391)
+++ lib/Target/PowerPC/PPCJITInfo.h	(working copy)
@@ -41,6 +41,11 @@
     /// code.
     ///
     virtual void replaceMachineCodeForFunction(void *Old, void *New);
+
+    /// InvalidateInstructionCache - Before the JIT can run a block of code
+    // that has been emitted it must invalidate the instruction cache on some
+    // platforms.
+    virtual void InvalidateInstructionCache(const void *Addr, unsigned len);
   };
 }
 
Index: lib/Target/PowerPC/PPCJITInfo.cpp
===================================================================
--- lib/Target/PowerPC/PPCJITInfo.cpp	(revision 52391)
+++ lib/Target/PowerPC/PPCJITInfo.cpp	(working copy)
@@ -330,12 +330,9 @@
 extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
 #endif
 
-/// SyncICache - On PPC, the JIT emitted code must be explicitly refetched to
-/// ensure correct execution.
-static void SyncICache(const void *Addr, size_t len) {
-#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
-  
-#ifdef __APPLE__
+void PPCJITInfo::InvalidateInstructionCache(const void *Addr, unsigned len) {
+#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
+defined(__APPLE__)  
   sys_icache_invalidate(Addr, len);
 #elif defined(__GNUC__)
   const size_t LineSize = 32;
@@ -352,8 +349,6 @@
       asm volatile("icbi 0, %0" : : "r"(Line));
   asm volatile("isync");
 #endif
-  
-#endif
 }
 
 void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
@@ -372,7 +367,7 @@
     MCE.emitWordBE(0);
     MCE.emitWordBE(0);
     EmitBranchToAt(Addr, (intptr_t)Fn, false, is64Bit);
-    SyncICache((void*)Addr, 7*4);
+    InvalidateInstructionCache((void*)Addr, 7*4);
     return MCE.finishFunctionStub(F);
   }
 
@@ -400,7 +395,7 @@
   MCE.emitWordBE(0);
   MCE.emitWordBE(0);
   EmitBranchToAt(BranchAddr, (intptr_t)Fn, true, is64Bit);
-  SyncICache((void*)Addr, 10*4);
+  InvalidateInstructionCache((void*)Addr, 10*4);
   return MCE.finishFunctionStub(F);
 }
 
Index: lib/ExecutionEngine/JIT/JITEmitter.cpp
===================================================================
--- lib/ExecutionEngine/JIT/JITEmitter.cpp	(revision 52391)
+++ lib/ExecutionEngine/JIT/JITEmitter.cpp	(working copy)
@@ -145,20 +145,6 @@
 
 JITResolver *JITResolver::TheJITResolver = 0;
 
-#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
-    defined(__APPLE__)
-extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
-#endif
-
-/// synchronizeICache - On some targets, the JIT emitted code must be
-/// explicitly refetched to ensure correct execution.
-static void synchronizeICache(const void *Addr, size_t len) {
-#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
-    defined(__APPLE__)
-  sys_icache_invalidate(Addr, len);
-#endif
-}
-
 /// getFunctionStub - This returns a pointer to a function stub, creating
 /// one on demand as needed.
 void *JITResolver::getFunctionStub(Function *F) {
@@ -756,7 +742,7 @@
   }
 
   // Invalidate the icache if necessary.
-  synchronizeICache(FnStart, FnEnd-FnStart);
+  TheJIT->getJITInfo().InvalidateInstructionCache(FnStart, FnEnd-FnStart);
   
   // Add it to the JIT symbol table if the host wants it.
   AddFunctionToSymbolTable(F.getFunction()->getNameStart(),


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