[LLVMdev] For the avoidance of doubt...

Sarah Thompson thompson at email.arc.nasa.gov
Mon Jul 30 09:47:17 PDT 2007


... can *any* instruction(s) other than load and store cause memory 
reads or writes?

This is pretty important, because I need to be able to track (at least) 
writes, and ideally also reads in order to be able to make 
explicit-state model checking work efficiently.

(I don't really care about reads or writes to spilled registers added by 
the code generator).


Sarah



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