[PATCH] D151750: [DAGCombine] `select_cc seteq X, 0, 0, cttz_zero_undef(X) -> and(cttz(X), sizeof(X) - 1)`

[Mikhail Gudim via Phabricator via llvm-commits]

mgudim updated this revision to Diff 527058.
mgudim added a comment.
Herald added subscribers: kerbowa, jrtc27, fedor.sergeev, jvesely, jyknight.

(1) Added check for legality of `AND`
(2) Made the check before insertion of `AND` stronger. Previous check could be not enough if the type size was not a power of 2.
(3) Updated affected tests


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151750/new/

https://reviews.llvm.org/D151750

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/fold-csel-cttz-and.ll
  llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
  llvm/test/CodeGen/SPARC/cttz.ll

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