[PATCH] D151750: [DAGCombine] `select_cc seteq X, 0, 0, cttz_zero_undef(X) -> and(cttz(X), sizeof(X) - 1)`

Mikhail Gudim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 31 05:51:56 PDT 2023


mgudim added a comment.

@craig.topper

> What if the target doesn't natively support CTLZ/CTTZ and only has CTLZ_ZERO_UNDEF/CTTZ_ZERO_UNDEF will end up with a select followed by the AND? What if the target doesn't support CTTZ/CTLZ at all?

The extra cases that I've added will go through the same legality checks as previous cases. The checks `(!LegalOperations || TLI.isOperationLegal(ISD::CTTZ, VT)))` still apply, right?



================
Comment at: llvm/test/CodeGen/AArch64/fold-csel-cttz-and.ll:130
 ; CHECK:       // %bb.0: // %entry
+
 ; CHECK-NEXT:    clz w8, w0
----------------
craig.topper wrote:
> Did the update_llc_test_checks.py script add this blank line?
It was me, my bad. Fixed it.


Repository:
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  https://reviews.llvm.org/D151750/new/

https://reviews.llvm.org/D151750



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