[PATCH] D147713: [RISCV] Combine concat_vectors of loads into strided loads

Luke Lau via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 7 06:16:34 PDT 2023


luke updated this revision to Diff 511677.
luke added a comment.

Address review comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147713/new/

https://reviews.llvm.org/D147713

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D147713.511677.patch
Type: text/x-patch
Size: 13607 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230407/8811728c/attachment.bin>


More information about the llvm-commits mailing list