[PATCH] D88033: [SVE][CodeGen] Legalisation of integer -> floating point conversions

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9083-9085
+  assert(VT.isScalableVector() && isTypeLegal(VT) &&
+         (EltTy == MVT::i1 || EltTy.isFloatingPoint()) &&
+         "Expected legal scalable vector type!");
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This can be summed up as `VT.isScalableVector() && isTypeLegal(VT) && isTypeLegal(Op.getOperand(0).getValueType())` but given Eli's comment you can just add the `isTypeLegal(Op.getOperand(0).getValueType())` part to the if statement to cover both bases.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1736-1740
+  // These allow bitcasts between unpacked_fp datatypes.
+  def : Pat<(nxv4f16 (reinterpret_cast (nxv2f16 ZPR:$src))), (COPY_TO_REGCLASS ZPR:$src, ZPR)>;
+  def : Pat<(nxv8f16 (reinterpret_cast (nxv4f16 ZPR:$src))), (COPY_TO_REGCLASS ZPR:$src, ZPR)>;
+  def : Pat<(nxv4f32 (reinterpret_cast (nxv2f32 ZPR:$src))), (COPY_TO_REGCLASS ZPR:$src, ZPR)>;
+
----------------
I doubt you need these anymore.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88033/new/

https://reviews.llvm.org/D88033