[PATCH] D85772: [AMDGPU] Fix FP/BP spills when MUBUF constant offset exceeded

Austin Kerbow via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 11 12:51:17 PDT 2020


kerbowa created this revision.
kerbowa added reviewers: arsenm, cdevadas.
Herald added subscribers: llvm-commits, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
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If we need a scratch register for the spill don't use the same scratch
register that is being used for the MBUF offset.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85772

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
  llvm/test/CodeGen/AMDGPU/stack-realign.ll

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