[PATCH] D85499: [X86] Canonicalize andnp for bitmask arithmetic

Fri Aug 7 10:42:12 PDT 2020

craig.topper added a comment.

In D85499#2202181 <https://reviews.llvm.org/D85499#2202181>, @RKSimon wrote:

> Are you saying you think we can get away with removing X86ISD::ANDNP entirely? We don't have it for the BMI scalar variant, and it /usually/ works.

I'm not saying that we can definitely get away with removing it. It has reasons for existing. I'm just saying I don't want to spread it further. We usually like to avoid target specific nodes when possible so increasing the scope of a target specific node seems the wrong direction. Masks and xmm/ymm/zmm vectors are already treated differently in many places. I don't see that having two canonical representations makes their differences that much larger than they already are.

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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:39637
+    SDValue CastRHS = DAG.getBitcast(CondVT, RHS);
+    SDValue AndN = DAG.getNode(X86ISD::ANDNP, DL, CondVT, Cond, CastRHS);
     return DAG.getBitcast(VT, AndN);
----------------
RKSimon wrote:
> This looks a separate NFC-ish change - a legacy from when the bitops were legal for just vXi64 types
This is the buggy code that is creating ANDNP for vXi1. The bitcast part is NFCish.

Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85499/new/

https://reviews.llvm.org/D85499