[PATCH] D84927: [TargetPassConfig] Run MachineVerifier after more passes
Zhang Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 30 03:07:58 PDT 2020
ZhangKang created this revision.
ZhangKang added reviewers: efriedma, hfinkel, PowerPC, MaskRay, echristo, bjope.
ZhangKang added a project: LLVM.
Herald added subscribers: wuzish, hiraditya.
ZhangKang requested review of this revision.
Some patches has upstreamed to fix the bug for MachineVerifier, now we can
run MachineVerifier after more passes.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D84927
Files:
llvm/lib/CodeGen/TargetPassConfig.cpp
Index: llvm/lib/CodeGen/TargetPassConfig.cpp
===================================================================
--- llvm/lib/CodeGen/TargetPassConfig.cpp
+++ llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -978,7 +978,7 @@
// GC
if (addGCPasses()) {
if (PrintGCInfo)
- addPass(createGCInfoPrinter(dbgs()), false);
+ addPass(createGCInfoPrinter(dbgs()));
}
// Basic block placement.
@@ -1163,7 +1163,7 @@
/// Add the minimum set of target-independent passes that are required for
/// register allocation. No coalescing or scheduling.
void TargetPassConfig::addFastRegAlloc() {
- addPass(&PHIEliminationID, false);
+ addPass(&PHIEliminationID);
addPass(&TwoAddressInstructionPassID, false);
addRegAssignmentFast();
@@ -1173,9 +1173,9 @@
/// optimized register allocation, including coalescing, machine instruction
/// scheduling, and register allocation itself.
void TargetPassConfig::addOptimizedRegAlloc() {
- addPass(&DetectDeadLanesID, false);
+ addPass(&DetectDeadLanesID);
- addPass(&ProcessImplicitDefsID, false);
+ addPass(&ProcessImplicitDefsID);
// LiveVariables currently requires pure SSA form.
//
@@ -1187,16 +1187,16 @@
// When LiveVariables is removed this has to be removed/moved either.
// Explicit addition of UnreachableMachineBlockElim allows stopping before or
// after it with -stop-before/-stop-after.
- addPass(&UnreachableMachineBlockElimID, false);
- addPass(&LiveVariablesID, false);
+ addPass(&UnreachableMachineBlockElimID);
+ addPass(&LiveVariablesID);
// Edge splitting is smarter with machine loop info.
- addPass(&MachineLoopInfoID, false);
- addPass(&PHIEliminationID, false);
+ addPass(&MachineLoopInfoID);
+ addPass(&PHIEliminationID);
// Eventually, we want to run LiveIntervals before PHI elimination.
if (EarlyLiveIntervals)
- addPass(&LiveIntervalsID, false);
+ addPass(&LiveIntervalsID);
addPass(&TwoAddressInstructionPassID, false);
addPass(&RegisterCoalescerID);
@@ -1247,7 +1247,7 @@
/// Add standard GC passes.
bool TargetPassConfig::addGCPasses() {
- addPass(&GCMachineCodeAnalysisID, false);
+ addPass(&GCMachineCodeAnalysisID);
return true;
}
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