[PATCH] D82239: RISC-V machine attribute to disable floating-point division and square root instructions in codegen

[Bandhav Veluri via Phabricator via llvm-commits]

vb000 updated this revision to Diff 272192.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82239/new/

https://reviews.llvm.org/D82239

Files:
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/no-fdiv-attr.ll

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