[PATCH] D81706: AMDGPU: Fix spill/restore of 192-bit registers

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 11 18:43:32 PDT 2020


arsenm created this revision.
arsenm added reviewers: rampitec, critson, kerbowa.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, qcolombet.
Herald added a project: LLVM.

I tried to use an IR inline asm test, but that doesn't work since the
inline asm handling asserts without an MVT to use.


https://reviews.llvm.org/D81706

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/test/CodeGen/AMDGPU/spill-wide-vgpr.ll
  llvm/test/CodeGen/AMDGPU/spill192.mir

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