[PATCH] D79598: [AArch64][SVE] Add patterns for VSELECT of immediates.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli added a comment.

> the case where %p is something like an icmp, where we can potentially rewrite the operation to produce an inverted result for free.

I am not sure I understand. Can you give an explicit example?

Regards,

Francesco



================
Comment at: llvm/test/CodeGen/AArch64/sve-vselect-imm.ll:114
+
+; TODO: We could actually use something like "sel z0.b, p0/z, #-128" if the
+; odd bits of the predicate are zero.
----------------
I am probably missing something trivial, but why would this be the case only if the odd bits if the predicate are zero?

Moreover, why not add the patterns needed for this directly in this patch? IIUC a higher `AddedComplexity` is what you need to prioritize the current pattern over the `sel` one.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79598/new/

https://reviews.llvm.org/D79598