[PATCH] D78662: [builtins] Support architectures with 16-bit int

[Ayke via Phabricator via llvm-commits]

aykevl added a comment.

In D78662#1997884 <https://reviews.llvm.org/D78662#1997884>, @efriedma wrote:

> Is making all shift amounts "int" consistent with what LLVM does?


So I've been looking into it a bit and found that LLVM appears to truncate these numbers to i8 before calling the function. Which makes sense, because with that you can still shift large numbers with just an i8. I think it doesn't matter which int it is in most calling conventions.
Source code for test: https://llvm.godbolt.org/z/xDaNQk
As you can see, only shifts of type `i16` or `i8` lack `mov` instructions to get the shift amount in the right place. And you can see that these are `mov` instructions (for 8-bit moves), not `movw` instructions (for 16-bit moves).

I have also compiled LLVM with the following patch:

  diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  index 453500aa9e5..2ff67feb99d 100644
  --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  @@ -3528,6 +3528,8 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
     }
   
     if (LC != RTLIB::UNKNOWN_LIBCALL && TLI.getLibcallName(LC)) {
  +    printf("shift libcall operand 1:\n");
  +    N->getOperand(1).dump();
       SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
       TargetLowering::MakeLibCallOptions CallOptions;
       CallOptions.setSExt(isSigned);

For the above example I get the following output on AVR:

  shift libcall operand 1:
  t23: i8 = truncate t6
  shift libcall operand 1:
  t9: i8 = truncate t6
  shift libcall operand 1:
  t6: i8,ch = CopyFromReg t0, Register:i8 %2
  shift libcall operand 1:
  t45: i8 = truncate t10
  shift libcall operand 1:
  t38: i8 = truncate t10
  shift libcall operand 1:
  t15: i8 = truncate t10
  shift libcall operand 1:
  t10: i8,ch = CopyFromReg t0, Register:i8 %4

Notice that all shift widths are of type i8.
Unfortunately I don't have any other architectures compiled in that need such shifts (such as msp430).


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https://reviews.llvm.org/D78662