[PATCH] D78608: [llvm] [CodeGen] Fixed vector halving bug for masked load

Aart Bik via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 21 22:43:18 PDT 2020


aartbik marked an inline comment as done.
aartbik added a comment.

In D78608#1996059 <https://reviews.llvm.org/D78608#1996059>, @craig.topper wrote:

> I'm concerned that there might be a way to get HiMemVT to contain 0 elements. I think v17i32 would trigger it. We'd widen to v32i32, then split to v16i32 which will have a memvt of v1i32 and v16i32. Then we'll split the v16i32 pieces. And now we'll try to split that v1i32 memory vt.


But do you agree this solution goes in the right direction?
Do you have any suggestions for the v17i32 case?
Happy to test that tomorrow and think about it some more.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:9468
+std::pair<EVT, EVT>
+SelectionDAG::GetDependentSplitDestVTs(const EVT &VT, const EVT &LoVT,
+                                       const EVT &HiVT) const {
----------------
craig.topper wrote:
> EVTs should be passed by value.
I mimicked the prototypes of related methods in this file? Are those wrong too?
Happy to change, just checking what best practices are here?


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