[PATCH] D78608: [llvm] [CodeGen] Fixed vector halving bug for masked load

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I'm concerned that there might be a way to get HiMemVT to contain 0 elements. I think v17i32 would trigger it. We'd widen to v32i32, then split to v16i32 which will have a memvt of v1i32 and v16i32. Then we'll split the v16i32 pieces. And now we'll try to split that v1i32 memory vt.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:9468
+std::pair<EVT, EVT>
+SelectionDAG::GetDependentSplitDestVTs(const EVT &VT, const EVT &LoVT,
+                                       const EVT &HiVT) const {
----------------
EVTs should be passed by value.


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https://reviews.llvm.org/D78608