[PATCH] D78311: [AMDGPU] New helper functions to get a register class of a given width

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 16 11:41:41 PDT 2020


rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1282
+    return &AMDGPU::VReg_1RegClass;
+  case 32:
+    return &AMDGPU::VGPR_32RegClass;
----------------
return VGPR_LO16 for 16?


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1324
+  switch (BitWidth) {
+  case 32:
+    return &AMDGPU::SReg_32RegClass;
----------------
There is now SGPR_LO16.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78311/new/

https://reviews.llvm.org/D78311





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