[PATCH] D78311: [AMDGPU] New helper functions to get a register class of a given width

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1304
+static const TargetRegisterClass *
+getAGPRClassForBitWidth(unsigned BitWidth) {
+  switch (BitWidth) {
----------------
This should probably include the full set of sizes to avoid weird legalization problems, but I guess some are already missing


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1415
 const TargetRegisterClass *SIRegisterInfo::getEquivalentVGPRClass(
                                          const TargetRegisterClass *SRC) const {
+  unsigned Size = getRegSizeInBits(*SRC);
----------------
This could really be a static method


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1430
 
 const TargetRegisterClass *SIRegisterInfo::getEquivalentSGPRClass(
                                          const TargetRegisterClass *VRC) const {
----------------
Can be static method


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78311/new/

https://reviews.llvm.org/D78311