[PATCH] D76007: [WIP][TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes

[Lewis Revill via Phabricator via llvm-commits]

lewis-revill updated this revision to Diff 255750.
lewis-revill added a comment.

Rebased.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76007/new/

https://reviews.llvm.org/D76007

Files:
  llvm/include/llvm/CodeGen/GlobalISel/RegisterBank.h
  llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
  llvm/lib/CodeGen/GlobalISel/RegisterBank.cpp
  llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterBankInfo.h
  llvm/lib/Target/RISCV/RISCVSubtarget.cpp
  llvm/lib/Target/X86/X86RegisterBankInfo.cpp
  llvm/utils/TableGen/RegisterBankEmitter.cpp

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