[PATCH] D77003: [MLIR] Add missing asserts in interchangeLoops util, doc comment update

[Uday Bondhugula via Phabricator via llvm-commits]

bondhugula added inline comments.


================
Comment at: mlir/lib/Transforms/Utils/LoopUtils.cpp:724
+    assert(dyn_cast<AffineForOp>(*loop.getBody()->begin()) == innerLoop &&
+           "input not perfectly nested");
+    innerLoop = loop;
----------------
mehdi_amini wrote:
> Should we also check that the body of these loops contains only a single operation (other than the terminator)?
Yes, you are right - we should be. Fixed.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D77003/new/

https://reviews.llvm.org/D77003