[PATCH] D75819: [PowerPC][NFC] Rename instruction formats in PPCInstrPrefix.td

Stefan Pintilie via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 11 13:35:16 PDT 2020


stefanp requested changes to this revision.
stefanp added a comment.
This revision now requires changes to proceed.

Talked this over with the team and we have decided on a way to rename that class. See the comment.



================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:46
 
-class MLS_DForm_R_D34_RTA5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
-                           InstrItinClass itin, list<dag> pattern>
+class MLS_DForm_R_SI34_FRS5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
+                            InstrItinClass itin, list<dag> pattern>
----------------
lei wrote:
> amyk wrote:
> > Note that I've changed this format to have `SI34_FRS5`. I was originally going to change just `D34` to `SI34` but then the instruction format name would be `MLS_DForm_R_SI34_RTA5`. This would not be possible, as there already exists an instruction format with this name (below the current instruction format).
> Based on the other names, I think this should be `MLS_DForm_R_SI34_FRSA5` since D_RA is 34 bits immediate + 5 bit register field RA.
Hi Amy,
After a discussion with the team we think it would be better just to add a `_MEM` to this name (So, `MLS_DForm_R_SI34_RTA5_MEM`). 

The two names are the same because the formats are effectively the same. This is just a special case where the immediate and the register have been combined to form a memory address. If we add the MEM at the end we can indicate that this is a memory op and make that the difference from the other class.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75819/new/

https://reviews.llvm.org/D75819





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