[PATCH] D75857: [AMDGPU] Fix using physical registers in vector instructions

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

Test case? Is this related to the atomic optimizer  and/or the ballot intrinsic?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75857/new/

https://reviews.llvm.org/D75857