[PATCH] D75699: [mlir] [VectorOps] Merge VectorReduction/VectorReductionV2 into one Op

[Aart Bik via Phabricator via llvm-commits]

aartbik marked an inline comment as done.
aartbik added inline comments.


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Comment at: mlir/lib/Dialect/VectorOps/VectorOps.cpp:98
+
+static ParseResult parseReductionOp(OpAsmParser &parser,
+                                    OperationState &result) {
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rriddle wrote:
> nicolasvasilache wrote:
> > Re assembly format, file a bug for @rriddle linking to this diff?
> > Another way, if variadic is more tricky to impl automatically (because of say combinatorial effects with variadic operands), could be to allow multiple declarative forms and a simple convention on optional arg ordering?
> It already does: https://mlir.llvm.org/docs/OpDefinitions/#optional-groups
Ah, very interesting! The customer parsing/printing here has a minor advantage of printing less type information (since most of it is inferred), but that is good to keep in mind. Thanks.


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