[PATCH] D75371: [ARM] Optimise ASRL/LSRL to smaller shifts using demand bits.

[Sam Parker via Phabricator via llvm-commits]

samparker added a comment.

Are there tests for shifts greater than 31? And don't we do some weird stuff with negative shifts, or is that just with custom nodes?



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Comment at: llvm/lib/Target/ARM/ARMISelLowering.h:358
+                                           TargetLoweringOpt &TLO,
+                                           unsigned Depth) const;
+
----------------
Doesn't this need override?


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https://reviews.llvm.org/D75371