[PATCH] D75086: [AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of G_PHIs just before selection.

Quentin Colombet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 26 11:59:36 PST 2020


qcolombet accepted this revision.
qcolombet added a comment.
This revision is now accepted and ready to land.

> s16 operations, if legal, just get selected to gpr32 regclass instructions. E.g.

  %ld:gpr(s16) = G_LOAD ...
  =>
  %ld:gpr32 = LDR_16 ...

That's interesting, because that means you have inreg extension where you would have regular extension in the IR.
E.g.,

  s16 = G_LOAD
  s32 = G_ZEXT s16

>
=

  gpr32 = LDR_16
  gpr32 = G_ZEXT gpr32

I would have expected that instead we would have combined loads with the related extension to from an extended load.

Anyway, I guess this ship has sailed.

LGTM.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75086/new/

https://reviews.llvm.org/D75086





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