[PATCH] D74368: [TBLGEN] Fix subreg value overflow in DAGISelMatcher

Brian Cain via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 24 07:35:45 PST 2020


bcain added inline comments.


================
Comment at: llvm/utils/TableGen/RegisterInfoEmitter.cpp:176
       OS << "namespace " << Namespace << " {\n";
-    OS << "enum {\n  NoSubRegister,\n";
+    OS << "enum : uint16_t {\n  NoSubRegister,\n";
     unsigned i = 0;
----------------
Is it expected that the context for this .inc should have already included `<cstdint>` or that tablegen should be emitting that include in order to use this type?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74368/new/

https://reviews.llvm.org/D74368





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