[PATCH] D75035: [AArch64][SVE] Refactor the implementation of gathers/scatters (NFC)

[Andrzej Warzynski via Phabricator via llvm-commits]

andwar created this revision.
andwar added a reviewer: sdesmalen.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: rengolin.
Herald added a reviewer: efriedma.
Herald added a project: LLVM.

These NFCs unify how gathers and scatters are implemented. Relevant
definitions/functions are renamed so that they are no longer specific to
regular gathers/scatters. The split into Vector-Scalar (VS) and
Scalar-Vector (SV) cases is also highlighted.

List of changes:

- `performLD1GatherCombine` and `performST1ScatterCombine` are renamed as `performGatherLoadCombine` and `performScatterStoreCombine`, respectively.
- The implementation of `performGatherLoadCombine` and `performScatterStoreCombine` are unified
- Selection DAG types for scatters and gathers from  AArch64SVEInstrInfo.td are renamed. The old name suggested that they are specific to regular gathers/scatters, which is not the case. As an example, `SDT_AArch64_GLD1` is renamed as `SDT_AArch64_GATHER_SV`. SV stands for Scalar-Vector, as opposed to Vector-Scalar (VS).
- The intrinsic classes in IntrinsicsAArch64.td are renamed to better highlight the separation into Scalar-Vector (SV) and Vector-Scalar (VS) cases.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75035

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td

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