[PATCH] D74943: [GISel][KnownBits]{NFC} Add a cache mechanism to speed compile time

[Amara Emerson via Phabricator via llvm-commits]

aemerson added inline comments.


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Comment at: llvm/include/llvm/CodeGen/GlobalISel/GISelKnownBits.h:37
+  /// Cache maintained during a computeKnownBits request.
+  DenseMap<const MachineInstr *, KnownBits> ComputeKnownBitsCache;
 
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dsanders wrote:
> qcolombet wrote:
> > arsenm wrote:
> > > This assumes an instruction with a single def
> > Good point. I'll do the mapping with a Register instead.
> Thanks. My long term plan for the intra/inter-pass cache is based about caching based on the register too. The thinking being that passes can't cause known bits of a vreg to become unknown or change without also breaking their contracts (you might not be able to tell that a known bit is still known but it still is). Legalize/Combine/ISel/etc. are all required to emit functionally equivalent replacements. They'll sometimes make undefined bits known so the stale cache issue still matters for optimization but not for correctness.
Would it be beneficial to use a SmallDenseMap here?


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  https://reviews.llvm.org/D74943/new/

https://reviews.llvm.org/D74943