[PATCH] D74254: [llvm][aarch64] SVE addressing modes.

Fri Feb 21 12:04:03 PST 2020

fpetrogalli marked 2 inline comments as done.
fpetrogalli added inline comments.

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Comment at: llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll:250
+                                      <vscale x 2 x i8> *%base_load,
+                                      i32 8,
+                                      <vscale x 2 x i1> %mask)
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fpetrogalli wrote:
> sdesmalen wrote:
> > nit: did you chose a different alignment here on purpose?
> No  - it is not on purpose. Do you want me to set everything to 1?  I wouldn't bother, non of the code added in this patch care of the value of the alignment...
Well, it was easier to change everything to `i32 1` instead of doing another round of questions! :)

Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74254/new/

https://reviews.llvm.org/D74254